1. Technical Field
The present invention relates generally to the field of computer memory systems and, more particularly but not exclusively, to detection and correction of data errors.
2. Background Art
Soft errors in data storage elements, such as cells of a memory device, occur when incident radiation charges or discharges the storage element, thereby changing its binary state. Soft errors are increasingly a concern with smaller scale fabrication processes as the size (hence, the capacitance) of the storage elements shrink, since incident radiation will have greater effect in causing the soft errors on such smaller scale storage elements. Previously, soft errors were statistically significant only for large and dense storage structures, such as cache memories. However, the smaller feature structures of next-generation memory devices are now more prone to having soft errors.
A problem with soft errors is that they have a tendency to silently corrupt data. This type of silent data corruption (SDC) is not desirable, particularly in a hard drive and/or a solid-state drive (SSD) of a computer system. Conventional error mitigation techniques variously provide for the storage of error correction codes along with the respective data to which such error correction codes each correspond. As computer system technologies increasingly rely on efficient utilization of memory storage capacity, the burdens imposed by having to support error detection and correction will be increasingly significant in terms of their affect on memory device performance.